• DocumentCode
    2059821
  • Title

    2.2 A +70dBm IIP3 single-ended electrical-balance duplexer in 0.18um SOI CMOS

  • Author

    van Liempd, Barend ; Hershberg, Benjamin ; Raczkowski, Kuba ; Ariumi, Saneaki ; Karthaus, Udo ; Bink, Karl-Frederik ; Craninckx, Jan

  • Author_Institution
    Imec, Leuven, Belgium
  • fYear
    2015
  • fDate
    22-26 Feb. 2015
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    The electrical-balance (EB) duplexer concept explored in [1-4] suggests a possible integrated multiband alternative to conventional fixed-frequency surface-acoustic-wave (SAW) duplexers. The basic principle of the EB duplexer is to balance the impedances seen at the ports of a hybrid transformer to suppress signal transfer from the TX to the RX through signal cancellation (Fig. 2.2.1). While the potential payoff is tantalizing, several challenges must still be solved before EB duplexers can become commercially viable. Specifically, the duplexer must provide high isolation and linearity in both the TX and RX bands across wide bandwidth (BW), with low insertion loss (IL), all in the presence of a real antenna whose impedance is constantly varying due to real-world user interaction. In this paper, we present a duplexer that significantly advances the state-of-the-art for two of these critical challenges: linearity and insertion loss.
  • Keywords
    CMOS integrated circuits; isolation technology; losses; pulse transformers; radio transceivers; silicon-on-insulator; surface acoustic waves; BW; EB duplexer concept; IIP3 single-ended electrical-balance duplexer; IL; RX bands; SAW duplexers; SOI CMOS; TX bands; antenna; fixed-frequency surface-acoustic-wave duplexers; high isolation; hybrid transformer; insertion loss; integrated multiband alternative; linearity loss; potential payoff; real-world user interaction; receiver; signal cancellation; signal transfer suppression; silicon-on-insulator; size 0.18 mum; transmitter; wide bandwidth; Antenna measurements; Antennas; Capacitors; Impedance; Insertion loss; Linearity; Ports (Computers);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
  • Conference_Location
    San Francisco, CA
  • Print_ISBN
    978-1-4799-6223-5
  • Type

    conf

  • DOI
    10.1109/ISSCC.2015.7062851
  • Filename
    7062851