Linearity evaluation technique for CMOS differential amplifier

A very important block in VLSI CMOS analog design, the classical differential amplifier presents the disadvantage of the nonlinearity of the transfer characteristic, especially for large values of the differential input voltage amplitude, this undesired behavior being concretized in large distortions introduced by the circuit. The proposed approach of the CMOS differential amplifier solves in an intuitive manner the quantitative and quantitative evaluation of the circuit nonlinearity by using an expansion in Taylor series of the amplifier transfer function. Additionally, a very simple and efficient linearization technique will be proposed, based on the compensation of the quadratic characteristic of the MOS transistor biased in saturation by using complementary current-mode square-root circuits. SPICE simulations and Fourier analysis confirm the theoretical estimated results, contributing to a deep understand of the classical differential amplifier behavior and of the operation of linearization technique.