Title :
Optimal space compaction of test responses
Author :
Chakrabarty, Krishnendu ; Murray, Brian T. ; Hayes, John P.
Author_Institution :
Adv. Comput. Archit. Lab., Michigan Univ., Ann Arbor, MI, USA
Abstract :
Many built-in self-testing (BIST) schemes compress the test responses from a k-output circuit to q signature streams, where q≪k, a process termed space compaction. The effectiveness of a compaction method can be measured by its compaction ratio c=k/q. However, a high compaction ratio can introduce aliasing, which occurs when a faulty test response maps to the fault-free signature. We investigate the problem of designing zero-aliasing space compaction circuits with maximum compaction ratio cmax. We introduce a graph representation of test responses to study the space compaction process and relate space compactor design to a graph coloring problem. For a given circuit tender test, a given fault model, and a given test set, we determine qmin , which yields cmax=k/qmin. This provides a fundamental bound on the cost of signature based BIST. We develop a systematic design procedure for the synthesis of space compaction circuits and apply it to a number of ISCAS-85 benchmark circuits
Keywords :
built-in self test; data compression; fault diagnosis; graph colouring; integrated circuit testing; logic testing; ISCAS-85 benchmark circuits; built-in self-testing; compaction ratio; fault model; graph coloring problem; graph representation; signature based BIST; signature streams; test responses; test set; zero-aliasing space compaction circuits; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Compaction; Computer architecture; Costs; Laboratories; Q measurement; Research and development;
Conference_Titel :
Test Conference, 1995. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2992-9
DOI :
10.1109/TEST.1995.529915