Title :
A Method for Implementation of the DC-Balanced 8B/10B Coding Used in Superspeed USB
Author :
Abiri, Shaghayegh ; Sahebdel, Sara
Author_Institution :
Fac. of Eng., Sci. & Res. Branch, Islamic Azad Univ., Tehran, Iran
Abstract :
In this paper, a method for implementation of the DC-balanced 8B/10B coding used in Superspeed USB with employ a very fast FPGA from Altra family is proposed. This technique can be used by other high-speed serial buses such as PCI Express, IEEE 1394b, Serial ATA, SAS, Fiber Channel, SSA, Gigabit Ethernet, InfiniBand, XAUI, Serial RapidIO, DVI and HDMI (Transition Minimized Differential Signaling) that use the same coding. Using the look-up table and memory with fast technique made this design efficient to be implemented. Moreover, the proposed method has very low complexity and fast to execute with minimum logic and also easy to implement.
Keywords :
encoding; field programmable gate arrays; peripheral interfaces; table lookup; Altra family; DC-balanced 8B/10B coding; DVI; FPGA; Fiber Channel; Gigabit Ethernet; HDMI; IEEE 1394b; InfiniBand; PCI Express; SAS; SSA; Serial ATA; Serial RapidIO; Transition Minimized Differential Signaling; XAUI; high-speed serial bus; look-up table; superspeed USB; Clocks; Decoding; Encoding; Field programmable gate arrays; Simulation; Table lookup; Universal Serial Bus; 8B/10B coding; Running Disparity; SuperSpeed USB;
Conference_Titel :
Integrated Intelligent Computing (ICIIC), 2010 First International Conference on
Conference_Location :
Bangalore
Print_ISBN :
978-1-4244-7963-4
Electronic_ISBN :
978-0-7695-4152-5
DOI :
10.1109/ICIIC.2010.46
