DocumentCode :
2061774
Title :
A Many-Core Implementation Based on the Reconfigurable Mesh Model
Author :
Giefers, Heiner ; Platzner, Marco
Author_Institution :
Paderborn Univ., Paderborn
fYear :
2007
fDate :
27-29 Aug. 2007
Firstpage :
41
Lastpage :
46
Abstract :
The reconfigurable mesh is a model for massively parallel computing for which many algorithms with very low complexity have been developed. These algorithms execute cycles of bus configuration, communication, and constant-time computation on all processing elements in a lock-step. In this paper, we investigate the use of reconfigurable meshes as coprocessors to accelerate important algorithmic kernels. We discuss the development of a reconfigurable mesh on FPGA technology, including the host integration and the programming tool flow. Then, we present implementation results and a proof-of-concept case study.
Keywords :
field buses; field programmable gate arrays; parallel processing; reconfigurable architectures; FPGA technology; algorithmic kernel; bus configuration; constant-time computation; parallel computing; programming tool flow; reconfigurable mesh model; Acceleration; Communication switching; Computational modeling; Coprocessors; Delay; Field programmable gate arrays; Kernel; Parallel processing; Scalability; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4244-1060-6
Electronic_ISBN :
978-1-4244-1060-6
Type :
conf
DOI :
10.1109/FPL.2007.4380623
Filename :
4380623
Link To Document :
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