DocumentCode :
2061802
Title :
5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with −22dB worst-case PSNR for miniaturized SoCs
Author :
Junghyup Lee ; Pyoungwon Park ; SeongHwan Cho ; Minkyu Je
Author_Institution :
Inst. of Microelectron., Singapore, Singapore
fYear :
2015
fDate :
22-26 Feb. 2015
Firstpage :
1
Lastpage :
3
Abstract :
Low-power CMOS reference clock oscillators have been widely used in miniaturized SoCs for emerging microsystems such as implantable biomedical devices and smart sensors. In such SoCs, as the supply voltage shrinks and the level of analog and digital circuit integration increases to meet rigorous power and area constraints, the noise from other blocks (especially digital blocks) couples through supply and ground lines and poses a serious threat to the performance of CMOS reference clock oscillators.
Keywords :
CMOS integrated circuits; clocks; intelligent sensors; low-power electronics; oscillators; prosthetics; reference circuits; system-on-chip; analog circuit integration; differential CMOS reference clock oscillator; digital circuit integration; frequency 4.7 MHz; implantable biomedical devices; low-power oscillators; microsystems; miniaturized SoC; power 53 muW; smart sensors; CMOS integrated circuits; Capacitors; Clocks; Jitter; Oscillators; PSNR;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4799-6223-5
Type :
conf
DOI :
10.1109/ISSCC.2015.7062948
Filename :
7062948
Link To Document :
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