DocumentCode
2061828
Title
Parallel decoding for burst error control codes
Author
Fujiwara, Eiji ; Namba, Kazuteru ; Kitakami, Masato
Author_Institution
Graduate Sch. of Inf. Sci. & Eng., Tokyo Inst. of Technol., Japan
fYear
2002
fDate
2002
Firstpage
429
Abstract
In some applications, such as in holographic memories, high-speed parallel decoding is strongly required for burst error correction and detection. From this viewpoint, this paper demonstrates a parallel decoding method for burst error control codes and presents the decoding circuit implemented by combinational circuits, not by LFSRs.
Keywords
combinational circuits; decoding; error correction codes; error detection codes; burst error control codes; burst error correction; burst error detection; combinational circuits; decoding circuit; error pattern generation; holographic memories; inverse nonsingular matrix; parallel decoding; Circuits; Control engineering education; Decoding; Design engineering; Educational technology; Error correction; Error correction codes; Fires; Information science; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Theory, 2002. Proceedings. 2002 IEEE International Symposium on
Print_ISBN
0-7803-7501-7
Type
conf
DOI
10.1109/ISIT.2002.1023701
Filename
1023701
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