Submicron CBiCMOS technology with new well and buried layer formed by multiple energy ion implantation

Author

Higashitani, Keiichi ; Kuroi, Takashi ; Suda, Kakutaro ; Hatanaka, Masahiro ; Nagao, VShigeo ; Tsubouchi, Natsuro

Author_Institution

Mitsubishi Electr. Corp., Hyogo, Japan

fYear

1991

fDate

12-15 May 1991

Abstract

A simple 0.6-μm complementary BiCMOS (CBiCMOS) technology was developed without an epitaxial layer. The wells and the buried layers for all transistors were formed by only three steps of masking layers, using multiple energy ion implantation with megaelectronvolt energy. The problem of the secondary defect induced by high dose and high energy ion implementation was solved by using the rapid thermal annealing technique. The cutoff frequencies for n-p-n and p-n-p were 11 GHz and 5 GHz, respectively. Using this technology, high-performance LSIs including mixed analog/digital devices can be developed

Keywords

BIMOS integrated circuits; annealing; integrated circuit technology; ion implantation; large scale integration; 0.6 micron; 11 GHz; 5 GHz; CBiCMOS technology; RTA; buried layer formation; complementary BiCMOS; cutoff frequencies; high performance LSI; megaelectronvolt energy; mixed analog/digital devices; multiple energy ion implantation; rapid thermal annealing; submicron technology; three masking layers; well formation; Bipolar transistors; Boron; CMOS technology; Fabrication; Impurities; Ion implantation; Isolation technology; Leakage current; MOS devices; Rapid thermal annealing;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0015-7

Type

conf

DOI

10.1109/CICC.1991.164004

Filename

164004