DocumentCode
2062277
Title
8.2 Batteryless Sub-nW Cortex-M0+ processor with dynamic leakage-suppression logic
Author
Wootaek Lim ; Inhee Lee ; Sylvester, Dennis ; Blaauw, David
Author_Institution
Univ. of Michigan, Ann Arbor, MI, USA
fYear
2015
fDate
22-26 Feb. 2015
Firstpage
1
Lastpage
3
Abstract
Recent low-voltage design techniques have enabled dramatic improvements in miniaturization and lifetime of wireless sensor nodes [1-3]. These systems typically use a secondary battery to provide energy when the sensor is awake and operating; the battery is then recharged from a harvesting source when the sensor is asleep. In these systems, the key requirement is to minimize energy per operation of the sensor. This extends the number of operations on one battery charge and/or reduces the time to recharge the battery between awake cycles. This requirement has driven significant advances in energy efficiency [1-2] and standby power consumption [3].
Keywords
energy conservation; energy harvesting; power consumption; secondary cells; battery charging; battery recharging; batteryless subnW Cortex-M0+ processor; dynamic leakage suppression logic; energy efficiency; harvesting source; low-voltage design technique; secondary battery; standby power consumption; wireless sensor nodes; Batteries; Inverters; Logic gates; Photovoltaic cells; Power demand; Robustness; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
Conference_Location
San Francisco, CA
Print_ISBN
978-1-4799-6223-5
Type
conf
DOI
10.1109/ISSCC.2015.7062968
Filename
7062968
Link To Document