Session 9 overview: High-performance wireless: Wireless subcommittee

State-of-the-art wireless systems implemented in low-cost, deep-submicron CMOS processes support a wide range of applications including 2/3/4G cellular and 802.11a/b/g/n/ac. This session includes a multiband GSM/EDGE/HSPA+/TDSCDMA/LTE transceiver, the first reported single-chip HSPA transceiver with fully-integrated 3G CMOS power amplifiers, a transmitter with 10b 128MS/S incremental-charge-based DAC achieving −155dBc/Hz out-of-band noise, a digital quadrature transmitter based on the IQ cell sharing, a 5.3GHz 16b 1.75GS/S wideband RF Mixing-DAC achieving IMD<-82dBc up to 1.9GHz, an LTE SAW-less transmitter using 33% Duty-Cycle LO signals for harmonic suppression, and a 28nm CMOS digital fractional-N PLL LO with −245.5dB FOM for 802.11abgn/ac radio.