Title :
An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs
Author :
Vasicek, Zdenek ; Sekanina, Lukas
Author_Institution :
Brno Univ. of Technol., Brno
Abstract :
This paper presents a new approach to the FPGA implementation of image filters which are utilized to remove the salt-and-pepper noise of high intensity (up to 70% of corrupted pixels). The proposed solution combines image filters designed by means of evolutionary algorithm with a simple human-designed preprocessing and post-processing unit. It provides the same filtering capability as a standard adaptive median filter; however, using four times less Virtex slices.
Keywords :
adaptive filters; evolutionary computation; field programmable gate arrays; image denoising; median filters; FPGA implementation; adaptive median filtering; evolutionary algorithm; human-designed post-processing unit; human-designed preprocessing unit; image filters; salt-and-pepper noise; Adaptive filters; Costs; Field programmable gate arrays; Filter bank; Hardware; Image generation; Information filtering; Information filters; Information technology; Pixel;
Conference_Titel :
Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4244-1060-6
Electronic_ISBN :
978-1-4244-1060-6
DOI :
10.1109/FPL.2007.4380650
