DocumentCode :
2062566
Title :
9.5 efficient digital quadrature transmitter based on IQ cell sharing
Author :
Hadong Jin ; Dongsu Kim ; Sangsu Jin ; Hankyu Lee ; Kyunghoon Moon ; Huijung Kim ; Bumman Kim
Author_Institution :
Pohang Univ. of Sci. & Technol., Pohang, South Korea
fYear :
2015
fDate :
22-26 Feb. 2015
Firstpage :
1
Lastpage :
3
Abstract :
As new complex communication standards employ various modulation methods in various frequency bands, interest in the software-defined radio (SDR) transceiver to support the standards is increasing. For the flexible transceiver, a digital-intensive transmitter has many advantages and has been pursued intensively. The efficiency of the transmitter chain is strongly dependent on the PA, and switching PAs, such as Class-D and F PAs, are used due to their high efficiency. A polar transmitter is suited for the switching operation and receives a large attention. However, a CORDIC is needed for l/Q-to-Polar conversion, and it is very complex. Moreover, the polar signal has a large bandwidth compared to the l/Q signal bandwidth. On the contrary, the quadrature transmitter that does not require the CORDIC, is simple and low computing cost with low power consumption. Due to the favorable characteristics, the quadrature transmitters have been studied. [1] employs an RFDAC based on a Gilbert mixer. It operates in a current mode and the output impedance varies with the number of on-cells. Due to the impedance variation, it is difficult to have a high linearity. In [2], the input digital code is processed by delta-sigma modulation for smaller digital bits and enhanced resolution. However the modulator generates quantization noise. In [3-6], a voltage-mode transmitter is employed with a power combiner based on a switched capacitor. The output impedance is constant, determined by the total capacitance regardless of the on/off cell condition. Moreover, this architecture delivers much higher output power and efficiency than previously reported works. [4] used delta-sigma modulation with cascade PWM to improve linearity. In [5], a quadrature architecture was employed to eliminate the problems of the polar architecture. Due to the 90° phase difference of conventional digital l/Q LOs, the output power of the conventional quadrature transmitter has lower than that of polar, maxim- m 3dB lower when the magnitude of I and Q are equal.
Keywords :
delta-sigma modulation; power combiners; pulse width modulation; software radio; transmitters; CORDIC; Gilbert mixer; IQ cell sharing; RFDAC; SDR transceiver; cascade PWM; delta-sigma modulation; digital-intensive transmitter; efficient digital quadrature transmitter; polar transmitter; power combiner; quantization noise; software-defined radio transceiver; switched capacitor; voltage-mode transmitter; Capacitors; Computer architecture; Microprocessors; Power generation; Radio transmitters; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4799-6223-5
Type :
conf
DOI :
10.1109/ISSCC.2015.7062979
Filename :
7062979
Link To Document :
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