Session 10 overview: Advanced wireline techniques and PLLs: Wireline subcommittee

How many Gb/s can you suck through a straw? Can we make a smartphone out of Lego-like blocks? To answer these questions and more, this session presents several unconventional approaches for data links in emerging applications. The session also shows innovations in transceiver techniques for more conventional communication links as well as advances in PLL design. The session includes a plastic waveguide link with an on-chip coupler, a non-contact interface, techniques for multi-drop memory buses, and 14-nm designs. The final three papers describe new approaches in injection-locked clock multipliers and fractional-N PLLs.