An Execution Model for Hardware/Software Compilation and its System-Level Realization

We introduce a new execution model for orchestrating the interaction between the conventional processor and the re-configurable compute unit in adaptive computer systems. We then characterize the architectural and OS-level requirements of implementing the model, and demonstrate how they can be achieved on a real hardware platform running under a full scale multi-tasking virtual protected memory operating system. Experimental measurements show the efficiency of our solution, and also prove that reconfigurable computing can be competitive with processors even for non-streaming, pointer-chasing applications.