DocumentCode :
2062819
Title :
A Generalized and Unified SPFD-Based Rewiring Technique
Author :
Maidee, Pongstorn ; Bazargan, Kia
Author_Institution :
Minnesota Univ., Minneapolis
fYear :
2007
fDate :
27-29 Aug. 2007
Firstpage :
305
Lastpage :
310
Abstract :
Traditionally, logic synthesis constrains the solution space of later design steps, such as physical design, because they are applied in sequence. Rewiring is a technique to restructure a circuit while maintaining its functionality. Since design properties and objectives can be considered during post-synthesis rewiring, it can help relieve constraints put forth by decisions made at earlier design steps. The extent of rewiring of a rewiring algorithm has a great impact on the success of the design flow. This paper presents a powerful rewiring technique that in addition to unifying all previously proposed set-of-pairs-of-functions-to-be-distinguished based rewiring techniques, it can perform rewiring with more than one wire which increases our ability to circumvent poorly-decided early design constraints. With this ability, the rewiring ability of using different numbers of wires is reported for the first time in this paper. Our technique can be used for run-lime/quality trade-off in any given rewiring application.
Keywords :
automatic test pattern generation; field programmable gate arrays; logic design; wiring; design flow; logic synthesis; rewiring technique; set-of-pairs-of-functions-to-be-distinguished; unified SPFD; Algorithm design and analysis; Bipartite graph; Circuit synthesis; Design optimization; Integrated circuit synthesis; Logic circuits; Logic design; Runtime; Very large scale integration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4244-1060-6
Electronic_ISBN :
978-1-4244-1060-6
Type :
conf
DOI :
10.1109/FPL.2007.4380664
Filename :
4380664
Link To Document :
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