• DocumentCode
    2063786
  • Title

    Physical modeling and alleviation of shallow-trench-isolation charging effects in silicon-on-insulator complementary bipolar technology

  • Author

    Yindeepol, Wipawan ; Foote, Richard ; De Santis, J. ; Krakowski, Tracey ; Bulucea, Constantin

  • Author_Institution
    Nat. Semicond. Corp., Santa Clara, CA, USA
  • fYear
    2004
  • fDate
    13-14 Sept. 2004
  • Firstpage
    40
  • Lastpage
    43
  • Abstract
    Oxide charging, adversely influencing PNP collector-base capacitance, has been observed and modeled physically in a complementary bipolar process that uses dielectric isolation. A practical solution to alleviate this effect is described along with trade-offs involved in process and device design.
  • Keywords
    bipolar transistors; isolation technology; leakage currents; silicon-on-insulator; PNP devices; SOI complementary bipolar technology; STI charging effects; Si-SiO2; collector-base capacitance; dielectric isolation; leakage effects; oxide charging; shallow-trench-isolation; silicon-on-insulator; Aluminum; Capacitance; Dielectric substrates; Doping; Etching; Insulation; Noise measurement; Planarization; Silicon on insulator technology; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting
  • Print_ISBN
    0-7803-8618-3
  • Type

    conf

  • DOI
    10.1109/BIPOL.2004.1365740
  • Filename
    1365740
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2063786