• DocumentCode
    2063937
  • Title

    A hybrid router combining circuit switching and packet switching with virtual channels for on-chip networks

  • Author

    Jie Lin ; Wei Zhou ; Zhiyi Yu ; Xiaoyang Zeng

  • Author_Institution
    State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
  • fYear
    2013
  • fDate
    28-31 Oct. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper, we propose a hybrid router which combines circuit switching and packet switching with virtual channels for on-chip networks in order to efficiently transfer streaming and best-effort traffics in specific applications. Time Division Multiplexing (TDM) technique and clock-gating scheme are used to take the benefits from the flexibility and throughput advantage of packet-switched router and superior power efficiency performance of circuit-switching. Synthesis and simulation results show that the proposed router has a gain of optimization in latency and average power consumption compared to either of the routers with single switching technique, with a slight growth of 6.8% in area overhead, while the virtual channels increase the network bandwidth by 26%.
  • Keywords
    circuit switching; network routing; network-on-chip; packet switching; TDM; circuit switching; clock gating scheme; hybrid router; on-chip networks; packet switching; power efficiency performance; time division multiplexing; virtual channels; Clocks; Hybrid power systems; Packet switching; Power demand; Switches; Switching circuits; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC (ASICON), 2013 IEEE 10th International Conference on
  • Conference_Location
    Shenzhen
  • ISSN
    2162-7541
  • Print_ISBN
    978-1-4673-6415-7
  • Type

    conf

  • DOI
    10.1109/ASICON.2013.6811838
  • Filename
    6811838