Data compression in space under generalized mergeability based on concepts of cover table and frequency ordering

This paper considers the general problem of designing and analyzing efficient space compression techniques for built-in self-testing of VLSI circuits using compact test sets. The techniques are based on identifying certain inherent properties of the test output responses of the CUT and the knowledge of failure probabilities. The generalized mergeability criteria of output sequences are developed utilizing the concepts of Hamming distance, sequence weights, cover table and frequency ordering for an arbitrary number of outputs and the effect of failure probabilities on the mergeability criteria is analyzed as well. The techniques proposed achieve a very high fault coverage for single stuck-line faults, with low CPU simulation time, and acceptable hardware overhead, as evident from extensive simulation results on ISCAS 85 combinational benchmark circuits, under conditions of both stochastic independence and dependence of single and multiple line errors