Title :
Controllable LFSR for BIST
Author :
Kay, Douglas ; Mourad, Samiha
Author_Institution :
Cisco Syst. Inc., San Jose, CA, USA
Abstract :
This paper presents the preliminary results for a novel mixed-mode scheme to generate test patterns for random pattern resistant faults. It is based on a programmable method in contrast to the hardware implementation used so far. It not only guarantees the full test coverage in the combinational stuck-at faults, but also can be extended to the sequential or delay path testing. The result shows that the full test coverage was possible with the smaller size of control vectors, up to a 70% reduction in size from the original scan test vectors
Keywords :
built-in self test; combinational circuits; delay estimation; design for testability; fault diagnosis; finite state machines; logic testing; mixed analogue-digital integrated circuits; random processes; shift registers; BIST; LFSR; combinational stuck-at faults; control vectors; delay path testing; finite state machine; mixed-mode scheme; programmable method; random pattern resistant faults; scan test vectors; sequential testing; test coverage; test patterns; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Clocks; Delay; Hardware; Sequential analysis; System testing; Test pattern generators;
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2000. IMTC 2000. Proceedings of the 17th IEEE
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-5890-2
DOI :
10.1109/IMTC.2000.846857
