An 8-bit 100KS/s low power successive approximation register ADC for biomedical applications

This paper presents an 8-bit 100KS/s successive approximation register (SAR) analog-to-digital convertor (ADC) in SMIC 0.13 μm 1P8M process for biomedical applications. This ADC is implemented with sub-circuits consuming no static power, thereby preserving the desired low power characteristic. According to the measured results, the SAR ADC has a signal-to-noise distortion ratio (SNDR) of 49.2 dB, and the spurious free dynamic range (SFDR) of 63 dB for a 9.37 kHz full-scale input sinusoidal wave at a 100 kHz sampling rate. The effective number of bit (ENOB) is 7.8 bits. The differential nonlinearity (DNL) is in the range of -0.15/+0.15 LSB whereas the integral nonlinearity (INL) is within -0.35/+0.23 LSB. The total power is 3.2uW and the figure of merit (FOM) is 143 fJ/conversion-step.