A Run-Time Reconfigurable Processor for Video Motion Estimation

Motion estimation is the central operation and simultaneously the most computational intensive step in video encoding. Fast block matching motion estimation search algorithms iteratively use different search patterns, making their implementation in hardware difficult. This paper proposes a new mechanism and a new architecture, in order to implement an hardware motion estimation processor that supports most of the existing fast search algorithms. Experimental results in FPGAs show that the proposed motion estimator is able to reconfigure itself between two consecutive blocks, allowing the search algorithm to adapt according to the features of frames and perform motion estimation in real time on CIF images.