A 1V, 2.4 GHz low power CMOS receiver front end for wireless micro sensor nodes

Author

Sasilatha, T. ; Raja, J.

Author_Institution

Anna Univ., Chennai

fYear

2008

fDate

17-19 Oct. 2008

Firstpage

89

Lastpage

94

Abstract

This paper focuses on the modified design, measurements and implementations of receiver front end targeted for wireless sensor network applications. Key issues in wireless sensor network receivers are discussed and the existing circuit level implementations of low noise amplifiers are compared. Emphasis was placed on observing device reliability constraints at low power to maximize the life time of the wireless sensor nodes. The proposed architecture can operate at 2.4 GHz and dissipates a power of 22.6 muw from a 1 V supply. A noise figure of 3.9 dB at 20 db gain and IIP3 of -3.1 dBm was obtained. The noise performance at input, output and the frequency response is presented.

Keywords

CMOS integrated circuits; UHF integrated circuits; low noise amplifiers; receivers; telecommunication network reliability; wireless sensor networks; device reliability constraints; frequency 2.4 GHz; gain 20 dB; low noise amplifiers; low power CMOS receiver front end; noise figure 3.9 dB; power 22.6 muW; voltage 1 V; wireless microsensor nodes; wireless sensor network applications; Batteries; Circuits; Energy consumption; Feedback; Frequency; Impedance; Low-noise amplifiers; Noise figure; Sensor systems; Wireless sensor networks; Common Source LNA; Constant current source; Gain; IIP3; LNA; Noise Figure; Stability; Wireless micro sensor nodes;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, Signals and Coding, 2008. MIC-CSC '08. Proceedings of the Mosharaka International Conference on

Conference_Location

Amman

Print_ISBN

978-9957-486-05-1

Type

conf

Filename

5073930