Design and implementation of a general purpose power-saving scheduling algorithm for embedded systems

Many studies have proposed dynamic voltage and frequency scaling (DVFS) techniques for reducing power consumption in embedded systems. Most of these approaches use the rate between the deadline of a task and the worst case execution time (WCET) of the task to modify the operating frequency of the processor. For this kind of method, an analysis of the given application must be conducted to obtain some arguments for the algorithm, such as the worst case execution time of each task and the dependency of the task set. Since countless applications are available for portable devices, it is difficult to implement this kind of algorithm for portable devices. The present study proposes an algorithm for reducing power consumption that can be easily implemented on an actual hardware device. The algorithm uses system scheduling and sets the deadline of the task to the value indicated by the user to dynamically scale voltage and frequency. The proposed algorithm was applied to a real-time kernel (MicroC/OS-II), which was ported to an embedded platform (PAC Duo). Experiment results show that the proposed algorithm can reduce energy consumption by up to 45.1%.