Key component designs of subthreshold baseband processors in passive RF device

Author

Weiwei Shi ; Chiu-Sing Choy ; Teng, Robert

Author_Institution

Shenzhen Key Lab. of Adv. Commun. & Inf. Process., Shenzhen Univ., Shenzhen, China

fYear

2013

fDate

28-31 Oct. 2013

Firstpage

1

Lastpage

4

Abstract

The essential data link portions: clock generation, time-to-digital convertsion and PIE decoder with wide tolerance for the baseband processor in passive RFID (Radio Frequency Identification) devices are presented in this paper. For the consideration of low power and low-voltage supply, energy-aware structure with mixed counter and pre-counted addition are proposed for the circuit design. They also help to reduce the impact of frequency variation and simplify the oscillator. Fabricated in 130nm CMOS technology, the whole low-complexity circuit can operate at 0.3 V power supply.

Keywords

CMOS digital integrated circuits; circuit complexity; passive networks; radiofrequency identification; time-digital conversion; CMOS technology; PIE decoder; clock generation; data link portions; energy-aware structure; frequency variation; low-complexity circuit; passive RF device; passive RFID devices; radio frequency identification devices; size 130 nm; subthreshold baseband processors; time-to-digital conversion; voltage 0.3 V; Baseband; Clocks; Decoding; Passive RFID tags; Program processors; Radiation detectors; Radio frequency;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC (ASICON), 2013 IEEE 10th International Conference on

Conference_Location

Shenzhen

ISSN

2162-7541

Print_ISBN

978-1-4673-6415-7

Type

conf

DOI

10.1109/ASICON.2013.6811908

Filename

6811908