Title :
Improved unified interconnect unit for high speed and scalable FPGA
Author :
Lei Li ; Jian Wang ; Jinmei Lai
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
This paper presents a completely unified interconnect unit (UINT) including unified input and output multiplexers (UIM and UOM) which are usually non-repeatable [1-3]. UINT ensures different logic modules could have exactly the identical interconnect circuit, providing higher scalability for FPGAs. Furthermore, Multi-Vt switch circuit combining low threshold voltage and high threshold voltage transistors is put forward to minimize the adverse effects brought by threshold voltage loss and decrease of Supply Voltage in Nanometer technology, attaining high speed performance of FPGA. The proposed interconnect unit is applied to own-designed Fudan Programmable (FDP5) FPGA and realized through 65 nm technology. Post-layout simulation results indicate that the proposed interconnect circuit is well-designed with up to 40% improvement of speed performance compared to the prior work [3] equivalent to the same technology, yet maintaining lower power consumption and smaller area, reduced by 12% and 35% respectively.
Keywords :
field programmable gate arrays; integrated circuit interconnections; logic design; low-power electronics; FDP5; Fudan programmable FPGA; UIM; UINT; UOM; high speed FPGA; high threshold voltage transistors; identical interconnect circuit; logic modules; multi-Vt switch circuit; nanometer technology; power consumption; scalable FPGA; size 65 nm; speed performance; supply voltage; unified input multiplexers; unified interconnect unit; unified output multiplexers; Delays; Field programmable gate arrays; Integrated circuit interconnections; Multiplexing; Switching circuits; Threshold voltage; Transistors;
Conference_Titel :
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location :
Shenzhen
Print_ISBN :
978-1-4673-6415-7
DOI :
10.1109/ASICON.2013.6811912