Title :
Graph Steiner tree construction and its routing applications
Author :
Jun Dong ; Hengliang Zhu ; Min Xie ; Xuan Zeng
Author_Institution :
Dept. of Microelectron., Fudan Univ., Shanghai, China
Abstract :
A new heuristic algorithm is presented for graph Steiner tree problem (GSTP) with high quality solution. It consists of four steps based on tree splitting and merging. Then we apply this new heuristic algorithm to IC chip routing applications including obstacle-avoiding rectilinear Steiner minimal tree problem (OARSMT) for Manhattan architecture and obstacle-avoiding octilinear Steiner minimal tree problem (OAOSMT) for X-architecture. Through escape graph, OARSMT is converted to GSTP. We also propose several geometric transformations to construct OAOSMT from OARSMT. Experimental results show our heuristic algorithm for GSTP can get better solutions than traditional classic heuristic algorithms and our method to construct OAOSMT can reduce total wire length by at most 15%, compared with the wire length of OARSMT.
Keywords :
integrated circuit design; network routing; trees (mathematics); Manhattan architecture; OARSMT; X-architecture; escape graph; graph Steiner tree construction; heuristic algorithm; integrated circuit routing; obstacle avoiding rectilinear Steiner minimal tree problem; routing applications; Heuristic algorithms; Integrated circuit interconnections; Merging; Routing; Steiner trees; Wires; OAOSMT; OARSMT; Steiner tree; routing;
Conference_Titel :
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location :
Shenzhen
Print_ISBN :
978-1-4673-6415-7
DOI :
10.1109/ASICON.2013.6811916