• DocumentCode
    2066129
  • Title

    A sorting-based IO connection assignment for flip-chip designs

  • Author

    Ran Zhang ; Xue Wei ; Watanabe, Toshio

  • Author_Institution
    Grad. Sch. of Inf., Production & Syst., Waseda Univ., Kitakyushu, Japan
  • fYear
    2013
  • fDate
    28-31 Oct. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In modern VLSI designs, flip-chip package is widely used to meet the higher integration density and the larger IO counts of circuits. Recently the IO buffers are mapped onto bump balls without changing the placement using re-distribution layer (RDL) in flip-chip designs. In this research, a sorting-based IO connection assignment for flip-chip designs is proposed to reduce the total wire length. The proposed method initially assigns the IO buffers to bump balls by sorting the Manhattan Distance between them, and then takes some pair-exchanges to modify the assignment. The experimental results show that compared with another partitioning-based IO assignment method, our proposed method can reduce the wire length by 12.94% on the average, at the expense of a little time consumption.
  • Keywords
    VLSI; flip-chip devices; integrated circuit design; integrated circuit interconnections; integrated circuit packaging; IO buffers; Manhattan distance; RDL; VLSI designs; bump balls; flip-chip designs; flip-chip package; integration density; partitioning based IO assignment; redistribution layer; sorting-based IO connection assignment; wire length reduction; Algorithm design and analysis; Educational institutions; Flip-chip devices; Routing; Sorting; Very large scale integration; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC (ASICON), 2013 IEEE 10th International Conference on
  • Conference_Location
    Shenzhen
  • ISSN
    2162-7541
  • Print_ISBN
    978-1-4673-6415-7
  • Type

    conf

  • DOI
    10.1109/ASICON.2013.6811927
  • Filename
    6811927