Incremental symbolic construction for topological modeling of analog circuits

Author

Hanbin Hu ; Guoyong Shi ; Yan Zhu

Author_Institution

Sch. of Microelectron., Shanghai Jiao Tong Univ., Shanghai, China

fYear

2013

fDate

28-31 Oct. 2013

Firstpage

1

Lastpage

4

Abstract

Symbolic methods for analog circuit analysis and modeling have been well studied. However, little is known on how to create symbolic models incrementally while a circuit topology is being modified. This paper proposes an incremental symbolic construction method applicable to incremental circuit topology change based on a previously developed data structure called GPDD (graph-pair decision diagram). An incremental GPDD algorithm (iGPDD) is proposed. It is demonstrated experimentally that with proper symbol ordering the iGPDD method outperforms the restarted GPDD construction method.

Keywords

analogue circuits; data structures; decision diagrams; graph theory; network topology; GPDD construction method; analog circuit analysis; analog circuit topological modeling; data structure; graph-pair decision diagram; iGPDD method; incremental GPDD algorithm; incremental symbolic construction method; Algorithm design and analysis; Analog circuits; Analytical models; Boolean functions; Circuit topology; Data structures; Solids; Binary decision diagram (BDD); graph-pair decision diagram (GPDD); incremental construction; infinite symbol; symbol ordering;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC (ASICON), 2013 IEEE 10th International Conference on

Conference_Location

Shenzhen

ISSN

2162-7541

Print_ISBN

978-1-4673-6415-7

Type

conf

DOI

10.1109/ASICON.2013.6811928

Filename

6811928