• DocumentCode
    2066577
  • Title

    Deep sub-micron IDDQ test options

  • Author

    Sachdev, Manoj

  • Author_Institution
    Philips Res. Lab., Eindhoven, Netherlands
  • fYear
    1996
  • fDate
    20-25 Oct 1996
  • Firstpage
    942
  • Abstract
    The problem of pass/fail decision making with IDDQ testing will become increasingly difficult as the feature size and voltage are reduced in deep sub-micron regions due to increased transistor sub-threshold leakage currents. The off current of minimum sized devices is expected to increase at least by a factor of 100 as the feature size is reduced from 0.5 micron to 0.1 micron. The increase in transistor off current with ULSI complexity will have a significant impact on the future ofIDDQ testing
  • Keywords
    CMOS integrated circuits; ULSI; failure analysis; integrated circuit testing; leakage currents; 0.1 m to 0.5 micron; IDDQ test; ULSI complexity; deep sub-micron devices; feature size; pass/fail decision making; transistor off current; transistor sub-threshold leakage currents; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1996. Proceedings., International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-3541-4
  • Type

    conf

  • DOI
    10.1109/TEST.1996.557171
  • Filename
    557171
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2066577