DocumentCode
2066636
Title
An empirical model for static I–V characteristics of double gate tunneling field effect transistor
Author
Huang, D.M. ; Yao, C.J. ; Shi, D.H. ; Li, M.F.
Author_Institution
Dept. of Microelectron., Fudan Univ., Shanghai, China
fYear
2013
fDate
28-31 Oct. 2013
Firstpage
1
Lastpage
4
Abstract
A simple empirical and analytical model for static I-V characteristic of double gate tunneling field effect transistor (TFET) is proposed. This model accounts for the drain current Id of a TFET as a function of both gate and drain biases, Vg and Vd, with only five parameters. The dependency of the model on the thickness of gate dielectric and bulk, tox and Tsi, can be easily included in the parameters. The model is compared extensively with the TCAD simulation. For a channel length Lc of 20nm, tox of 1, 2, and 3nm, and Tsi of 10 and 20nm, quantitative agreement between the model and simulation is demonstrated for Vg from ~0.3 to 2.0V and Vd from 0 to 2.0V. The model is easily applicable to deriving analytical expressions for the other device characteristics such as transconductance, output resistance, and the fluctuation of Id induced by a size variation such as tox. The physical origin of the model is also discussed.
Keywords
field effect transistors; semiconductor device models; technology CAD (electronics); tunnel transistors; TCAD simulation; TFET; double gate tunneling field effect transistor; drain biases; drain current; empirical model; gate biases; gate dielectric; output resistance; static I-V characteristics; transconductance; Analytical models; Data models; Field effect transistors; Logic gates; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location
Shenzhen
ISSN
2162-7541
Print_ISBN
978-1-4673-6415-7
Type
conf
DOI
10.1109/ASICON.2013.6811948
Filename
6811948
Link To Document