DocumentCode
2066663
Title
A new high performance RF LDMOS with vertical n+n-p-p+ drain structure
Author
Xiaofei Chen ; Yading Shen ; Xuecheng Zou ; Shuangxi Lin ; Wanghui Zou
Author_Institution
Dept. of Microelectron., Huazhong Univ. of Sci. & Technol., Wuhan, China
fYear
2013
fDate
28-31 Oct. 2013
Firstpage
1
Lastpage
4
Abstract
An improved radio-frequency (RF) lateral double-diffused metal-oxide-semiconductor (LDMOS) device based on Si-substrate process is proposed. The structure is characterized by a p+-buried-layer (PBL) buried under the drain in the p-substrate region. A vertical n+n-p-p+ diode formed at the drain side helps deplete the n-drift region and lengthen the lateral drift distance, thus effectively increasing the device breakdown voltage (BVDS) with negligible disturbances to the on-resistance (Ron) and RF performance as the PBL is far away from the carrier channel. Both theoretical analysis and simulations of PBL effects are demonstrated. Compared with the conventional device, the proposed RF-LDMOS device increase by 19.8% and 12.2% in BVDS and BVDS*ft, respectively.
Keywords
MOSFET; microwave field effect transistors; semiconductor diodes; PBL effects; Si; carrier channel; device breakdown voltage; high performance RF LDMOS; lateral drift distance; n-drift region; p+-buried-layer; radio-frequency lateral double-diffused metal-oxide-semiconductor device; silicon-substrate process; vertical n+n-p-p+ drain structure; vertical n+n-p-p+ diode;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location
Shenzhen
ISSN
2162-7541
Print_ISBN
978-1-4673-6415-7
Type
conf
DOI
10.1109/ASICON.2013.6811949
Filename
6811949
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