• DocumentCode
    2067503
  • Title

    Improving Power and Data Efficiency with Threaded Memory Modules

  • Author

    Ware, Frederick A. ; Hampel, Craig

  • Author_Institution
    Rambus Inc., Los Altos
  • fYear
    2007
  • fDate
    1-4 Oct. 2007
  • Firstpage
    417
  • Lastpage
    424
  • Abstract
    The technique of module-threading utilizes standard DDR DRAM components to build modified memory modules. These modified modules incorporate one or more additional control signals. The modification permits the module to operate at higher performance levels and at lower power levels than standard modules. The modified modules are also capable of finer granularity transactions while still operating at full bandwidth.
  • Keywords
    CMOS memory circuits; DRAM chips; distributed shared memory systems; memory architecture; multi-threading; storage management; CMOS memory integrated circuit; DDR DRAM component; data efficiency; distributed shared memory system; granularity transaction; memory architecture; memory management; threaded memory module; Bandwidth; CMOS integrated circuits; CMOS memory circuits; Logic circuits; Memory management; Power system management; Random access memory; Read-write memory; Timing; Topology; CMOS memory integrated circuits; Distributed memory systems; MOS memory integrated circuits; MOSFET memory integrated circuits; Memory architecture; Memory management; Shared memory systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design, 2006. ICCD 2006. International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1063-6404
  • Print_ISBN
    978-0-7803-9707-1
  • Electronic_ISBN
    1063-6404
  • Type

    conf

  • DOI
    10.1109/ICCD.2006.4380850
  • Filename
    4380850