DocumentCode
2067542
Title
Programming, compiling and executing partially-ordered instruction streams on scalable shared-memory multiprocessors
Author
Probst, David K.
Author_Institution
Dept. of Comput. Sci., Concordia Univ., Montreal, Que., Canada
Volume
1
fYear
1994
fDate
4-7 Jan. 1994
Firstpage
584
Lastpage
593
Abstract
Performance in large-scale shared-memory multiprocessors depends on finding a scalable solution to the memory-latency problem. The author shows that protect consistency (PRC) relaxes previous consistency models with two distinct performance benefits. First, PRC is used to expose and exploit more parallelism in the computation, giving better support to latency tolerance. Second, assuming that visible synchronization directly coordinates changes in the writability of shared data, PRC is used to create more situations where cached data are reusable, giving better support to latency avoidance. The paper evaluates PRC in the context of relaxing intrathread dependences for multithreaded architectures. After the PRC programming notation is described, programming and compiling aspects are examined, and architectural support is discussed.<>
Keywords
buffer storage; fault tolerant computing; parallel programming; program compilers; shared memory systems; PRC; cached data; compiling; executing; intrathread dependences; latency tolerance; memory-latency; multithreaded architectures; parallelism; partially-ordered instruction streams; performance; programming; protect consistency; scalable shared-memory multiprocessors;
fLanguage
English
Publisher
ieee
Conference_Titel
System Sciences, 1994. Proceedings of the Twenty-Seventh Hawaii International Conference on
Conference_Location
Wailea, HI, USA
Print_ISBN
0-8186-5090-7
Type
conf
DOI
10.1109/HICSS.1994.323130
Filename
323130
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