DocumentCode :
2067658
Title :
Scalable shared-memory architectures. Introduction to the minitrack
Author :
Stenström, Per
Author_Institution :
Dept. of Comput. Sci., Lund Univ., Sweden
Volume :
1
fYear :
1994
fDate :
4-7 Jan. 1994
Firstpage :
520
Lastpage :
521
Abstract :
The single address-space that shared-memory architectures offer simplifies programming, problem partitioning, and dynamic load balancing as compared to other programming models for parallel computing systems such as e.g. Message passing. Unfortunately, as we scale shared-memory architectures to large configurations, the resulting memory system latencies may limit their performance potentials. Finding cost-effective solutions to the memory-system latency issue has become an important research objective and is the main focus of this minitrack. Loosely speaking, scalability for these systems refers to optimizing both the performance and the implementation cost. While it is not meaningful to strictly define the term scalability, it is an important intuitive goal when evaluating new shared-memory architectures.<>
Keywords :
parallel architectures; performance evaluation; shared memory systems; dynamic load balancing; implementation cost; memory system latencies; parallel computing systems; performance; problem partitioning; programming; shared-memory architectures; single address-space;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System Sciences, 1994. Proceedings of the Twenty-Seventh Hawaii International Conference on
Conference_Location :
Wailea, HI, USA
Print_ISBN :
0-8186-5090-7
Type :
conf
DOI :
10.1109/HICSS.1994.323137
Filename :
323137
Link To Document :
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