Title :
A fast multi-core virtual platform and its application on software development
Author :
Zongyan Wang ; Dexue Zhang ; Yu Xueqiu ; Yu Zhiyi ; Xiaoyang Zeng
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
In this paper we present a fast multi-core virtual platform which employs a high-speed MIPS32LE single-core processor model provided by OVP. TLM-2.0 interfaces are devised for the comunication between different component models with a high simulation speed. NoC models wrapped by TLM-2.0 interface are created by SystemC. In addition, we implement and evaluate a fractional and integer frequency synchronizer for LTE downlink mapped on a multi-core processor using the virtual platform and therefore provide a novel method for SW development in the early stage of HW design. The experiment results also shows that the simulation on the multi-core virtual platform is at least 30 times faster than RTL simulation.
Keywords :
Long Term Evolution; multiprocessing systems; network-on-chip; software engineering; HW design; LTE downlink; NoC models; OVP; RTL simulation; SW development; SystemC; TLM-2.0 interfaces; fast multicore virtual platform; fractional frequency synchronizer; high-speed MIPS32LE single-core processor model; integer frequency synchronizer; million instructions per second performance; open virtual platforms; software development; transaction-level modeling; Computational modeling; Frequency synchronization; Multicore processing; Nickel; Software; Standards; Synchronization;
Conference_Titel :
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location :
Shenzhen
Print_ISBN :
978-1-4673-6415-7
DOI :
10.1109/ASICON.2013.6811991
