DocumentCode
2067837
Title
FPsed: a streaming content search-and-replace module for an Internet firewall
Author
Moscola, James ; Pachos, Michael ; Lockwood, John ; Loui, Ronald P.
Author_Institution
Dept. of Comput. Sci. & Eng., Washington Univ., St. Louis, MO, USA
fYear
2003
fDate
20-22 Aug. 2003
Firstpage
122
Lastpage
129
Abstract
A module has been implemented in field programmable gate array (FPGA) hardware that is able to perform regular expression search-and-replace operations on the content of Internet packets at Gigabit/second rates. All of the packet processing operations are performed using reconfigurable hardware within a single Xilinx Virtex XCV2000E FPGA. A set of layered protocol wrappers is used to parse the headers and payloads of packets for Internet protocol data. A content matching server automatically generates, compiles, synthesizes, and programs the module into the field-programmable port extender (FPX) platform.
Keywords
Internet; field programmable gate arrays; logic design; packet switching; security of data; string matching; transport protocols; FPGA implementation; FPX; FPsed; Internet firewall; Internet packet content; Internet protocol data; content matching server; field-programmable port extender platform; layered protocol wrappers; packet header parsing; packet payload parsing; packet processing operations; regular expression search-and-replace operations; streaming content search-and-replace module; Computer science; Field programmable gate arrays; Hardware; Internet; Network servers; Network synthesis; Payloads; Protocols; Switches; Web server;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Interconnects, 2003. Proceedings. 11th Symposium on
Print_ISBN
0-7695-2012-X
Type
conf
DOI
10.1109/CONECT.2003.1231488
Filename
1231488
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