• DocumentCode
    2068501
  • Title

    A novel method to predict die shift during compression molding in embedded wafer level package

  • Author

    Khong, Chee Houe ; Kumar, Aditya ; Zhang, Xiaowu ; Sharma, Gaurav ; Vempati, Srinivasa Rao ; Vaidyanathan, Kripesh ; Lau, John Hon-Shing ; Kwong, Dim-Lee

  • Author_Institution
    Agency for Sci., Technol. & Res., Inst. of Microelectron., Singapore
  • fYear
    2009
  • fDate
    26-29 May 2009
  • Firstpage
    535
  • Lastpage
    541
  • Abstract
    The increased functionality of cellular phones and handheld devices requires system level integration. Thus there is a strong demand in cell phone maker to move to embedded micro wafer level packaging (EMWLP). But the major problem encountered is die shift during compression molding. This paper presents a novel method to predict the die shift during wafer level molding process. A series of parametric studies are performed by changing the die thickness, die pitch distance and top mold chaste compression velocity. The effect of thinning down the chip thickness affects the pressure difference and local shear rate on the chip surfaces. The rate of change of epoxy mold compound fluid pressure across the die top surfaces is not constant. The local shear rate is increasing linearly from the centre of the wafer to the outermost die. From the parametric studies, the die shift is inversely proportional to the die thickness for wafer level molding. Such a phenomenon will reduce the lithography alignment error in the next process. This paper also shows that by reducing die pitch distance of a 5 times 5 mm2, 500 mum thick chip, the die shift decreases by a factor of 12%. In addition, the top mold chaste compression velocity contributes to the die shift by as much as 28% when the velocity is reduced by 50% from 100 mum/sec to 50 mum/sec Finally it is observed from experiment result that the die shift is not constant in all directions.
  • Keywords
    compression moulding; finite element analysis; wafer level packaging; EMWLP; chip thickness; compression molding; die pitch distance; die shift; die thickness; die top surfaces; embedded microwafer level package; epoxy mold compound fluid pressure; finite element model; local shear rate; parametric study; top mold chaste compression velocity; wafer level molding process; Assembly; Cellular phones; Compression molding; Copper; Costs; Handheld computers; Microelectronics; Parametric study; Semiconductor device packaging; Wafer scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2009. ECTC 2009. 59th
  • Conference_Location
    San Diego, CA
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4244-4475-5
  • Electronic_ISBN
    0569-5503
  • Type

    conf

  • DOI
    10.1109/ECTC.2009.5074066
  • Filename
    5074066