Title : 
Novel operation scheme and technological optimization for 1T bulk capacitor-less DRAM
         
        
            Author : 
Hui Li ; Wei Zhu ; Ningxi Liu ; Cunlin Dong ; Chao Meng ; Yinyin Lin ; Huang, R. ; Qingtian Zou ; Jingang Wu
         
        
            Author_Institution : 
ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China
         
        
        
        
        
        
            Abstract : 
A high performance bulk floating body memory device is demonstrated in this work. Experimental results show a data retention of 1.89s and a initial memory window over 60μA@85°C, which are excellent features for eDRAM application. A novel read method based on parasitic BJT effect is introduced to improve device performance. The impact of process parameters is investigated and P well doping is found to be the key factor. The scaling potential of the proposed read scheme is also evaluated by the measurement of devices with several (W/L, Tox) combinations.
         
        
            Keywords : 
DRAM chips; bipolar transistors; bulk floating body memory device; current 60 muA; eDRAM; memory window; parasitic BJT effect; temperature 85 C; time 1.89 s; Computer architecture; Doping; Logic gates; Microprocessors; Performance evaluation; Temperature; Temperature measurement;
         
        
        
        
            Conference_Titel : 
ASIC (ASICON), 2013 IEEE 10th International Conference on
         
        
            Conference_Location : 
Shenzhen
         
        
        
            Print_ISBN : 
978-1-4673-6415-7
         
        
        
            DOI : 
10.1109/ASICON.2013.6812021