An open 45nm PD-SOI standard cell library based on verified BSIM SOI spice model with predictive technology

Author

Gong Liwei ; Xu Yuan ; Zhang Zhi ; Shi Weiwei ; Teng, Robert K. F.

Author_Institution

Shenzhen Key Lab. of Adv. Commun. & Inf. Process., Shenzhen Univ., Shenzhen, China

fYear

2013

fDate

28-31 Oct. 2013

Firstpage

1

Lastpage

4

Abstract

This pager discusses an open source standard cell library of partially deplete Silicon-on-Insulator (PD-SOI) for use in nanometer PD-SOI research and education. The library includes both front end and back end for SOI digital integrated circuit (IC) design. The BSIMSOI level 10 model used in this study has been verified with the experimental data of a 45nm standard SOI process. The PD-SOI technology and PDK files for the 45nm PD SOI have also been developed.

Keywords

digital integrated circuits; integrated circuit design; integrated circuit modelling; silicon-on-insulator; BSIMSOI level 10 model; PD-SOI technology; PDK files; SOI digital integrated circuit design; open PD-SOI standard cell library; open source standard cell library; partially deplete silicon-on-insulator; size 45 nm; verified BSIM SOI spice model; CMOS integrated circuits; Libraries; Logic gates; MOS devices; Silicon-on-insulator; Standards; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC (ASICON), 2013 IEEE 10th International Conference on

Conference_Location

Shenzhen

ISSN

2162-7541

Print_ISBN

978-1-4673-6415-7

Type

conf

DOI

10.1109/ASICON.2013.6812058

Filename

6812058