An approach for reducing common-mode current on electronic control units using optimization algorithm

With the progress of integrated circuit technologies, high-speed and high-density electronic circuits have been designed. Consequently, EMI problems became very serious. One of the main causes of EMI on electronic control units is the common-mode current on the wire harness. It has been studied that the common-mode current can be reduced by controlling adequately the parasitic inductances and capacitances on PCBs. However, since there are numerous combinations of parasitic inductance and capacitance values, it is impractical to verify all of the combinations. In this paper, we propose a method which determines the parasitic inductance and capacitance values efficiently for reducing the common-mode current using an optimization algorithm. Finally, some simulations of the example circuit are performed with the proposed method. From the simulation results, the validity of the proposed method is verified.