DocumentCode :
2071342
Title :
Methodology for minimizing far-end noise coupling between interconnects in high-speed ceramic modules
Author :
Choi, Jinwoo ; Weekly, Roger ; Haridass, Anand ; Zhou, Tingdong
Author_Institution :
IBM Syst. & Technol. Group, IBM Corp., Austin, TX
fYear :
2009
fDate :
26-29 May 2009
Firstpage :
1227
Lastpage :
1233
Abstract :
In this paper, we present a methodology for minimizing far-end (FE) noise coupling between interconnects in high-speed ceramic modules. The high FE noise coupling between signal interconnects in ceramic modules has been a serious bottleneck for high-performance systems. A methodology employing power/ground mesh planes with minimized orthogonal lines and a via-connected coplanar-type shield (VCS) structure has been developed to minimize FE noise coupling between signal lines in ceramic modules. Optimized interconnect structure based on this methodology has demonstrated that the saturated FE crosstalk of a typical interconnect structure in ceramic modules could be reduced significantly by 88.7%.
Keywords :
ceramics; crosstalk; electric noise measurement; electron device noise; interconnections; modules; far-end noise coupling; high-speed ceramic modules; power-ground mesh planes; signal interconnects; via-connected coplanar-type shield structure; Ceramics; Crosstalk; Dielectric losses; Filling; Glass; Integrated circuit interconnections; Iron; Noise reduction; Packaging; Power system interconnection;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2009. ECTC 2009. 59th
Conference_Location :
San Diego, CA
ISSN :
0569-5503
Print_ISBN :
978-1-4244-4475-5
Electronic_ISBN :
0569-5503
Type :
conf
DOI :
10.1109/ECTC.2009.5074168
Filename :
5074168
Link To Document :
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