Title :
Model of deductive-parallel fault analysis
Author :
Hahanova, Anna ; Chugurov, Igor ; Parfentiy, Alexandr ; Obrizan, Vladimir
Author_Institution :
APVT Dept., Kharkov Nat. Univ. of Radioelectron., Ukraine
Abstract :
A high performance fault simulation method based on the superposition procedure is offered. It is oriented on large digital designs processing. Evaluation of RT and gate level design description is proposed in this work. The data structure and program are developed for algorithms´ realization of the proposed method and integration with automatic test pattern generation systems.
Keywords :
data structures; fault simulation; RT level design; algorithmic realization; automatic test pattern generation systems; data structure; deductive parallel fault analysis; digital designs processing; fault simulation method; gate level design; program realization; Algorithm design and analysis; Analytical models; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Digital systems; Fault detection; Process design; System testing;
Conference_Titel :
Modern Problems of Radio Engineering, Telecommunications and Computer Science, 2004. Proceedings of the International Conference
Conference_Location :
Lviv-Slavsko, Ukraine
Print_ISBN :
966-553-380-0
