DocumentCode
2071400
Title
Signal integrity loss in bus lines due to open shielding defects
Author
Aveñda, Victor ; Champac, Victor ; Figueras, Joan
Author_Institution
Electron. Dept., INAOE, Puebla, Mexico
fYear
2003
fDate
25-28 May 2003
Firstpage
79
Lastpage
84
Abstract
The interconnect structures in high speed circuits play an important role in present CMOS technologies. Inductance and capacitance coupling effects (crosstalk) may cause a significant loss in signal integrity in high performance systems. One way to reduce these effects is to place a signal line between two grounded lines (shield). In this paper we study the influence of defective grounding of shielding lines. We focus on resistive open defects due to manufacturing problems or broken vias. Faulty shields may cause undershoots or ringings in signals traveling in long interconnect lines. Simple expressions for undershoots and overshoots have been derived using dominant poles and employed to determine the zones of signal integrity violation for different lengths of interconnect lines. The results show the impact of defective grounded shields.
Keywords
CMOS integrated circuits; RLC circuits; coupled circuits; earthing; integrated circuit interconnections; integrated circuit modelling; shielding; system buses; CMOS; RLC circuit; bus lines signal integrity loss; capacitance coupling effects; crosstalk; dominant poles; grounded lines; high speed interconnect structures; inductance coupling effects; open shielding defects; resistive open defects; shielded signal line; shielding lines; signal integrity violation zones; signal overshoot; signal ringing; signal undershoot; CMOS technology; Capacitance; Circuit faults; Coupling circuits; Crosstalk; Grounding; Inductance; Integrated circuit interconnections; Manufacturing; Performance loss;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Workshop, 2003. Proceedings. The Eighth IEEE European
ISSN
1530-1877
Print_ISBN
0-7695-1908-3
Type
conf
DOI
10.1109/ETW.2003.1231672
Filename
1231672
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