A Fully Integrated LDR IR-UWB CMOS Transceiver Based on "1.5-bit" Direct Sampling

In this paper, we present a low-complexity low data rate (LDR) ultra wideband (UWB) transceiver prototype CMOS chip suitable for a differential binary phase shift keying (DBPSK) modulation applied data transmission with 500 MHz-bandwidth signals. This solution, which is mainly based on "1.5-bit" direct sub-sampling at 1 Gsps and differential digital correlations, enjoys good immunity to clock drift and interferers. It is also likely to offer an interesting trade-off between fine performance in dense multipath environments, low implementation complexity, and hence low power consumption. At first, the 1.5 bits concept is discussed. Then, the implementation choices for some critical blocks of the RX data path are discussed to justify the adopted low-complexity approach. Finally, some preliminary implementation results are provided.