DocumentCode :
2071750
Title :
Optimized delay and power performances for multi-walled CNT in global VLSI interconnects
Author :
Majumder, Manoj Kumar ; Das, Pradip K. ; Kaushik, B.K. ; Manhas, Sanjeev Kumar
Author_Institution :
Dept. of Electron. & Comput. Eng., Indian Inst. of Technol. Roorkee, Roorkee, India
fYear :
2012
fDate :
17-19 Dec. 2012
Firstpage :
1
Lastpage :
4
Abstract :
Multi-walled carbon nanotubes (MWCNTs) with higher number of shells have potentially provided attractive solution in propagation delay and power dissipation. This research paper presents an equivalent single conductor (ESC) model of MWCNT interconnect that is well accurate with any number of shells and distance from the ground plane. Using the ESC model, HSPICE circuit simulations have been performed for different number of shells in MWCNTs. Based on the simulation results, approximate number of shells have been calculated for optimized delay and power performances at global interconnect lengths.
Keywords :
SPICE; VLSI; carbon nanotubes; conductors (electric); integrated circuit interconnections; HSPICE circuit simulations; VLSI interconnects; equivalent single conductor model; ground plane; multi-walled CNT; multi-walled carbon nanotubes; power dissipation; propagation delay; Carbon nanotube (CNT); interconnect; multi-walled CNT (MWCNT); power dissipation; propagation delay;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computers and Devices for Communication (CODEC), 2012 5th International Conference on
Conference_Location :
Kolkata
Print_ISBN :
978-1-4673-2619-3
Type :
conf
DOI :
10.1109/CODEC.2012.6509358
Filename :
6509358
Link To Document :
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