Title :
Table of contents
Abstract :
The following topics are dealt with: network-on-chip design; verification and debug; processor architectures; memory design; CAD tools and methods; reliability and variability issues; energy-aware design techniques; and logic and high level synthesis.
Keywords :
high level synthesis; integrated circuit reliability; integrated memory circuits; microprocessor chips; network-on-chip; CAD tools; debug; energy-aware design techniques; high level synthesis; logic synthesis; memory design; network-on-chip design; processor architectures; reliability issues; variability issues; verification;
Conference_Titel :
VLSI (ISVLSI), 2013 IEEE Computer Society Annual Symposium on
Conference_Location :
Natal
DOI :
10.1109/ISVLSI.2013.6654665
