A fractional-N harmonic injection-locked frequency synthesizer with 10MHz–6.6GHz quadrature outputs for software-defined radios

This paper presents an area-efficient frequency synthesizer with a quadrature phase output using a fractional-N injection-locking technique for software-defined radios. A background calibration scheme is proposed to compensate for the PVT variations. Implemented in a 65nm CMOS process, this work demonstrates 10 MHz to 6.6 GHz continuous quadrature frequency coverage, while only occupies a small area of 0.38 mm² and consumes 16-26 mW depending on output frequency, from a 1.2 V power supply. The normalized phase noise achieves -135.3 dBc/Hz at 3 MHz offset, and -95.1 dBc/Hz in-band phase noise at 10 kHz offset, from a 1.7 GHz carrier frequency.