DocumentCode :
2073094
Title :
Studying optimal spilling in the light of SSA
Author :
Colombet, Quentin ; Brandner, Florian ; Darte, Alain
Author_Institution :
INRIA, ENS-Lyon, Lyon, France
fYear :
2011
fDate :
9-14 Oct. 2011
Firstpage :
25
Lastpage :
34
Abstract :
Recent developments in register allocation, mostly linked to static single assignment (SSA) form, have shown that it is possible to decouple the problem in two successive phases: a first spilling phase places load and store instructions so that the register pressure at all program points is small enough, a second assignment and coalescing phase maps the remaining variables to physical registers and reduces the number of move instructions among registers. This paper focuses on the first phase, for which many open questions remain: in particular, we study the notion of optimal spilling (what can be expressed?) and the impact of SSA form (does it help?). To identify the important features for optimal spilling on load-store architectures, we develop a new integer linear programming formulation, more accurate and expressive than previous approaches. Among other features, we can express SSA φ-functions, memory-to-memory copies, and the fact that a value can be stored simultaneously in a register and in memory. Based on this formulation, we present a thorough analysis of the results obtained for the SPECINT 2000 and EEMBC 1.1 benchmarks, from which we draw, among others, the following conclusions: a) rematerialization is extremely important, b) SSA complicates the formulation of optimal spilling, especially because of memory coalescing when the code is not in CSSA, c) micro-architectural features are significant and thus have to be accounted for, d) significant savings can be obtained in terms of static spill costs, cache miss rates, and dynamic instruction counts.
Keywords :
cache storage; instruction sets; integer programming; linear programming; optimising compilers; program diagnostics; storage management; CSSA; EEMBC 1.1 benchmarks; SPECINT 2000 benchmarks; SSA φ-functions; SSA form; cache miss rates; coalescing phase maps; dynamic instruction counts; integer linear programming formulation; load-store architectures; memory coalescing; memory-to-memory copy; microarchitectural features; optimal spilling; physical registers; register allocation; second assignment; spilling phase; static single assignment form; static spill costs; Force; Load modeling; Maintenance engineering; Memory management; Optimization; Registers; Resource management; Algorithms; Experimentation; Performance; Theory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compilers, Architectures and Synthesis for Embedded Systems (CASES), 2011 Proceedings of the 14th International Conference on
Conference_Location :
Taipei
Print_ISBN :
978-1-4503-0713-0
Type :
conf
Filename :
6062028
Link To Document :
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