Extensions of the Latency Insertion Method (LIM) to DC analysis of power supply networks and modeling of circuit interconnects with frequency-dependent parameters

In this paper, a fast circuit simulation technique based on the Latency Insertion Method (LIM) is proposed for the steady-state analysis of large-scale networks, such as on-chip power grids. The proposed method is shown to be very efficient for modeling of networks with very large numbers of nodes. The comparison with one of the best methods used for the power grid analysis today, the Random-Walk algorithm, shows that LIM is almost two orders of magnitude faster. Also, an extension of the LIM method to the treatment of interconnects with frequency-dependent parameters is proposed.