Title :
MINT-a VHDL simulation system
Author_Institution :
Swedish Inst. of Microelectron., Stockholm, Sweden
Abstract :
Several commercial VHDL simulators have been reported. Many of these however only support a subset of the language. This paper describes the development of a Multilevel Interactive (MINT) simulator that was designed from scratch specifically for VHDL. A brief overview of the complete is given first. Then generation of executable code for simulation purposes, and some VHDL specific features of the simulation kernel, are described
Keywords :
circuit analysis computing; simulation languages; specification languages; MINT; Multilevel Interactive; VHDL simulation system; simulation kernel; simulators; Data models; Data structures; Environmental management; Government; Information technology; Kernel; Microelectronics; Monitoring; Packaging; Virtual prototyping;
Conference_Titel :
Design Automation Conference, 1990., EDAC. Proceedings of the European
Conference_Location :
Glasgow
Print_ISBN :
0-8186-2024-2
DOI :
10.1109/EDAC.1990.136628
